require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&__ASM_ARM_PTRACE_H)) {
    eval 'sub __ASM_ARM_PTRACE_H () {1;}' unless defined(&__ASM_ARM_PTRACE_H);
    eval 'sub PTRACE_GETREGS () {12;}' unless defined(&PTRACE_GETREGS);
    eval 'sub PTRACE_SETREGS () {13;}' unless defined(&PTRACE_SETREGS);
    eval 'sub PTRACE_GETFPREGS () {14;}' unless defined(&PTRACE_GETFPREGS);
    eval 'sub PTRACE_SETFPREGS () {15;}' unless defined(&PTRACE_SETFPREGS);
    eval 'sub PTRACE_GETWMMXREGS () {18;}' unless defined(&PTRACE_GETWMMXREGS);
    eval 'sub PTRACE_SETWMMXREGS () {19;}' unless defined(&PTRACE_SETWMMXREGS);
    eval 'sub PTRACE_OLDSETOPTIONS () {21;}' unless defined(&PTRACE_OLDSETOPTIONS);
    eval 'sub PTRACE_GET_THREAD_AREA () {22;}' unless defined(&PTRACE_GET_THREAD_AREA);
    eval 'sub PTRACE_SET_SYSCALL () {23;}' unless defined(&PTRACE_SET_SYSCALL);
    eval 'sub PTRACE_GETCRUNCHREGS () {25;}' unless defined(&PTRACE_GETCRUNCHREGS);
    eval 'sub PTRACE_SETCRUNCHREGS () {26;}' unless defined(&PTRACE_SETCRUNCHREGS);
    eval 'sub USR26_MODE () {0x;}' unless defined(&USR26_MODE);
    eval 'sub FIQ26_MODE () {0x1;}' unless defined(&FIQ26_MODE);
    eval 'sub IRQ26_MODE () {0x2;}' unless defined(&IRQ26_MODE);
    eval 'sub SVC26_MODE () {0x3;}' unless defined(&SVC26_MODE);
    eval 'sub USR_MODE () {0x10;}' unless defined(&USR_MODE);
    eval 'sub FIQ_MODE () {0x11;}' unless defined(&FIQ_MODE);
    eval 'sub IRQ_MODE () {0x12;}' unless defined(&IRQ_MODE);
    eval 'sub SVC_MODE () {0x13;}' unless defined(&SVC_MODE);
    eval 'sub ABT_MODE () {0x17;}' unless defined(&ABT_MODE);
    eval 'sub UND_MODE () {0x1b;}' unless defined(&UND_MODE);
    eval 'sub SYSTEM_MODE () {0x1f;}' unless defined(&SYSTEM_MODE);
    eval 'sub MODE32_BIT () {0x10;}' unless defined(&MODE32_BIT);
    eval 'sub MODE_MASK () {0x1f;}' unless defined(&MODE_MASK);
    eval 'sub PSR_T_BIT () {0x20;}' unless defined(&PSR_T_BIT);
    eval 'sub PSR_F_BIT () {0x40;}' unless defined(&PSR_F_BIT);
    eval 'sub PSR_I_BIT () {0x80;}' unless defined(&PSR_I_BIT);
    eval 'sub PSR_J_BIT () {0x1000000;}' unless defined(&PSR_J_BIT);
    eval 'sub PSR_Q_BIT () {0x8000000;}' unless defined(&PSR_Q_BIT);
    eval 'sub PSR_V_BIT () {0x10000000;}' unless defined(&PSR_V_BIT);
    eval 'sub PSR_C_BIT () {0x20000000;}' unless defined(&PSR_C_BIT);
    eval 'sub PSR_Z_BIT () {0x40000000;}' unless defined(&PSR_Z_BIT);
    eval 'sub PSR_N_BIT () {0x80000000;}' unless defined(&PSR_N_BIT);
    eval 'sub PCMASK () {0;}' unless defined(&PCMASK);
    eval 'sub PSR_f () {0xff000000;}' unless defined(&PSR_f);
    eval 'sub PSR_s () {0xff0000;}' unless defined(&PSR_s);
    eval 'sub PSR_x () {0xff00;}' unless defined(&PSR_x);
    eval 'sub PSR_c () {0xff;}' unless defined(&PSR_c);
    unless(defined(&__ASSEMBLY__)) {
	eval 'sub ARM_cpsr () { $uregs[16];}' unless defined(&ARM_cpsr);
	eval 'sub ARM_pc () { $uregs[15];}' unless defined(&ARM_pc);
	eval 'sub ARM_lr () { $uregs[14];}' unless defined(&ARM_lr);
	eval 'sub ARM_sp () { $uregs[13];}' unless defined(&ARM_sp);
	eval 'sub ARM_ip () { $uregs[12];}' unless defined(&ARM_ip);
	eval 'sub ARM_fp () { $uregs[11];}' unless defined(&ARM_fp);
	eval 'sub ARM_r10 () { $uregs[10];}' unless defined(&ARM_r10);
	eval 'sub ARM_r9 () { $uregs[9];}' unless defined(&ARM_r9);
	eval 'sub ARM_r8 () { $uregs[8];}' unless defined(&ARM_r8);
	eval 'sub ARM_r7 () { $uregs[7];}' unless defined(&ARM_r7);
	eval 'sub ARM_r6 () { $uregs[6];}' unless defined(&ARM_r6);
	eval 'sub ARM_r5 () { $uregs[5];}' unless defined(&ARM_r5);
	eval 'sub ARM_r4 () { $uregs[4];}' unless defined(&ARM_r4);
	eval 'sub ARM_r3 () { $uregs[3];}' unless defined(&ARM_r3);
	eval 'sub ARM_r2 () { $uregs[2];}' unless defined(&ARM_r2);
	eval 'sub ARM_r1 () { $uregs[1];}' unless defined(&ARM_r1);
	eval 'sub ARM_r0 () { $uregs[0];}' unless defined(&ARM_r0);
	eval 'sub ARM_ORIG_r0 () { $uregs[17];}' unless defined(&ARM_ORIG_r0);
	if(defined(&__KERNEL__)) {
	    eval 'sub user_mode {
	        my($regs) = @_;
    		eval q(((($regs)-> &ARM_cpsr & 0xf) == 0));
	    }' unless defined(&user_mode);
	    if(defined(&CONFIG_ARM_THUMB)) {
		eval 'sub thumb_mode {
		    my($regs) = @_;
    		    eval q(((($regs)-> &ARM_cpsr &  &PSR_T_BIT)));
		}' unless defined(&thumb_mode);
	    } else {
		eval 'sub thumb_mode {
		    my($regs) = @_;
    		    eval q((0));
		}' unless defined(&thumb_mode);
	    }
	    eval 'sub processor_mode {
	        my($regs) = @_;
    		eval q((($regs)-> &ARM_cpsr &  &MODE_MASK));
	    }' unless defined(&processor_mode);
	    eval 'sub interrupts_enabled {
	        my($regs) = @_;
    		eval q((!(($regs)-> &ARM_cpsr &  &PSR_I_BIT)));
	    }' unless defined(&interrupts_enabled);
	    eval 'sub fast_interrupts_enabled {
	        my($regs) = @_;
    		eval q((!(($regs)-> &ARM_cpsr &  &PSR_F_BIT)));
	    }' unless defined(&fast_interrupts_enabled);
	    eval 'sub condition_codes {
	        my($regs) = @_;
    		eval q((($regs)-> &ARM_cpsr & ( &PSR_V_BIT| &PSR_C_BIT| &PSR_Z_BIT| &PSR_N_BIT)));
	    }' unless defined(&condition_codes);
	}
	eval 'sub pc_pointer {
	    my($v) = @_;
    	    eval q((($v) & ~ &PCMASK));
	}' unless defined(&pc_pointer);
	eval 'sub instruction_pointer {
	    my($regs) = @_;
    	    eval q(( &pc_pointer(($regs)-> &ARM_pc)));
	}' unless defined(&instruction_pointer);
	if(defined(&CONFIG_SMP)) {
	} else {
	    eval 'sub profile_pc {
	        my($regs) = @_;
    		eval q( &instruction_pointer($regs));
	    }' unless defined(&profile_pc);
	}
	if(defined(&__KERNEL__)) {
	    eval 'sub predicate {
	        my($x) = @_;
    		eval q((($x) & 0xf0000000));
	    }' unless defined(&predicate);
	    eval 'sub PREDICATE_ALWAYS () {0xe0000000;}' unless defined(&PREDICATE_ALWAYS);
	}
    }
}
1;